- Award
2019 IDEC Congress Chip Design Contest Best Design Award - Award
2019 IDEC Congress Chip Design Contest Best Poster Award - Award
IDEC 우수참여교수상 - Award
2017 IDEC SoC Congress Chip Design Contest Best Design Award - Research
ISSCC 2016 CNN Chip Featured in IEEE Spectrum April 2016 Issue
Hyeon-ho Kim received "Best Design Award" in 2019 IDEC Congress Chip Design Contest.
Seung-kyu Choi received "Best Poster Award" in 2019 IDEC Congress Chip Design Contest.
Lee-sup Kim received "우수참여교수상" in 2019 IDEC Congress Chip Design Contest.
Chong-soo Jung, Dong-il Lee and Dae-woong Lee(Advisor Lee-Sup Kim) received “Best Design Award” in 2017 IDEC SoC Congress Chip Design Contest.
Related paper: "A DLL-based Reference-less CDR with ISI Jitter Reduction Scheme "
by Chongsoo Jung
Our Convolutional Neural Network(CNN) chip presented at ISSCC 2016 is covered in the article "Neural Networks on the Go" in the IEEE Spectrum April 2016 Issue.
Related paper: "A 1.42TOPS/W Deep Convolutional Neural Network Recognition Processor for Intelligent IoE Systems"
by Jaehyeong Sim
Latest News
Oct. 13, 2021
강명구씨의 논문이 Transactions on Computer-Aided Design of Integrated Circuits and Systems에 게재 승인 되었습니다. Read MoreJuly 14, 2021
최승규씨의 논문이 IEEE/ACM International Conference On Computer Aided Design 학회에 게재 승인되었습니다. Read MoreJuly 14, 2021
박강규씨의 논문이 IEEE/ACM International Conference On Computer Aided Design 학회에 게재 승인되었습니다. Read MoreJuly 14, 2021
강명구씨의 논문이 IEEE/ACM International Conference On Computer Aided Design 학회에 게재 승인되었습니다. Read MoreVideo
Demonstration video of object classification from 32x32 input images using our CNN chip.Demonstration viedo of image classification from 28 x 28 handwritten digit images using FPGA.
Recently Accepted Papers
Journal (to be published)
| Myeonggu Kang, Hyein Shin, Lee-Sup Kim |
| A Framework for Accelerating Transformer-based Language Model on ReRAM-based Architecture |
| IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2021 |
| Youngbeom Jung, Hyeonuk Kim, Yeongjae Choi, Lee-Sup Kim |
| Quantization-Error-Robust Deep Neural Network for Embedded Accelerators |
| IEEE Transactions on Circuits and Systems II, 2021 |
| Myeonggu Kang, Hyeonuk Kim, Hyein Shin, Jaehyeong Sim, Kyeonghan Kim, Lee-Sup Kim |
| S-FLASH: A NAND Flash-based Deep Neural Network Accelerator Exploiting Bit-level Sparsity |
| IEEE Transactions on Computers, 2021 |
| Seungkyu Choi, Jaekang Shin, Lee-Sup Kim |
| A Deep Neural Network Training Architecture with Inference-aware Heterogeneous Data-type |
| IEEE Transactions on Computers, 2021 |
| Kangkyu Park, Seungkyu Choi, Yeongjae Choi, Lee-Sup Kim |
| Rare Computing: Removing Redundant Multiplications from Sparse and Repetitive Data in Deep Neural Networks |
| IEEE Transactions on Computers, 2021 |
Conference (to be presented)
| Seungkyu Choi, Jaekang Shin, Lee-Sup Kim |
| A Convergence Monitoring Method for DNN Training of On-Device Task Adaptation |
| IEEE/ACM International Conference On Computer Aided Design, 2021 |
| Kangkyu Park, Yunki Han, Lee-Sup Kim |
| Deferred Dropout: An Algorithm-Hardware Co-Design DNN Training Method Provisioning Consistent High Activation Sparsity |
| IEEE/ACM International Conference On Computer Aided Design, 2021 |
| Myeonggu Kang, Hyein Shin, Jaekang Shin, Lee-Sup Kim |
| A Framework for Area-efficient Multi-task BERT Execution on ReRAM-based Accelerators |
| IEEE/ACM International Conference On Computer Aided Design, 2021 |
| Hancheon Yun, Hyein Shin, Myeonggu Kang, Lee-Sup Kim |
| Optimizing ADC Utilization through Value-Aware Bypass in ReRAM-based DNN Accelerator |
| IEEE/ACM Design Automation Conference, 2021 |
| Hyein Shin, Myeonggu Kang, Lee-Sup Kim |
| Fault-free: A Fault-resilient Deep Neural Network Accelerator based on Realistic ReRAM Devices |
| IEEE/ACM Design Automation Conference, 2021 |
